Structure and method for measuring the etching speed

ABSTRACT

The specification discloses a structure and method for measuring the etching speed. A test layer is connected with several resistors. Etching the metal layer disconnects in order the resistors from the circuit. The equivalent resistance of the sensing resistor system is measured to obtain the etching speed. In consideration of the errors of the resistors, the invention also provides a structure that utilizes an IC layout technique to put an interdigitized dummy resistor beside the sensing resistors. By taking the ratio of the equivalent resistance of the sensing resistors and the dummy resistor, the invention can compute to obtain the etching speed.

BACKGROUND OF THE INVENTION

[0001] 1. Field of Invention

[0002] The invention relates to a structure of measuring the etchingspeed and the associated method. In particular, the invention relates toa method of detecting the etching speed of a metal layer in amicroelectromechanical system (MEMS) manufacturing process.

[0003] 2. Related Art

[0004] In the manufacturing process of microelectromechanical system(MEMS) devices, some suspending structures (the infrared (IR) sensor,micro heater, gas sensor, and pressure sensor in sensors and theaccelerator meter, micro motor, and gyroscope in actuators) are needed.The formation of such suspending structures is done by depositing asacrifice layer, followed by stacking a structure layer, and finallyetching the sacrifice layer to put the whole structure in a suspendingstate. Whether the suspending structure is perfect depends upon whetherthe etching is complete. The conventional judging method is to use amicroscope or scanning electronic microscope (SEM) to view the etchedpart by naked eyes. However, the efficiency is not good so that suchmanufacturing process cannot satisfy the need for mass production. Onthe other hand, most structures that are checked using the microscope orSEM are limited to the cases where the structure layer stacked on thesacrifice layer is made of a transparent material. Thus, theconventional method does not apply to opaque materials. Moreover, in theMEMS manufacturing process, the etching speed control is also anotherimportant factor. The method of using the microscope or SEM has also aworse precision.

SUMMARY OF THE INVENTION

[0005] In view of the foregoing, the invention provides a structure andmethod for measuring the etching speed. An objecive of the invention isto use the relation between the etching time and the equivalentresistance of sensing resistors in the structure to compute the etchingspeed.

[0006] To achieve the above objective, the disclosed structure includesa test layer and a plurality of sensing resistors. The sensing resistorsare connected to the test layer and adjacent resistors. When measuringthe etching speed, the sensing resistors form a circuit and one measurestheir equivalent resistance.

[0007] The disclosed method includes the following steps: providing atest layer and a plurality of sensing resistors connected to the testlayer and adjacent sensing resistors, forming a circuit from the sensingresistors for measuring its equivalent resistance during etching, andmeasuring the equivalent resistance of the sensing resistor andobtaining the corresponding etching depth and time, thereby computingthe etching speed.

[0008] In consideration of errors of resistors resulted from themanufacturing process, the invention also provides a structure formeasuring the etching speed. The structure includes a test layer,several sensing resistors, and several dummy resistors. The sensingresistors are connected to the test layer and adjacent resistors. Whenmeasuring the etching speed, the sensing resistors form a circuit andone measures their equivalent resistance. Each of the dummy resistors isclose to the corresponding sensing resistor. The two ends of each of thedummy resistors are connected to the two ends of its adjacent dummyresistors and form a parallel circuit. When measuring the etching speedof the test layer, the dummay resistors are combined with the sensingequivalent resistance to generate a reference value. This referencevalue is used to obtain the relation betwen the time and etching depth,thereby computing the etching speed.

[0009] Finally, the invention also provides a method for measuring theetching speed according to the previously introduced structure. Themethod includes the following steps. First, a test layer and severalsensing resistors are provided. The test layer and the adjacent sensingresistors are connected to form a parallel circuit for providing asensing equivalent resistance. Several dummy resistors are thenprovided; each dummy resistor is next to the corresponding sensingresistor. When measuring the etching speed on the test layer, a dummyequivalent resistance is produced to, along with the sensing equivalentresistance, generate a reference value. Finally, the reference value isused to compute the relation between the time and etching depth, therebyobtaining the etching speed.

BRIEF DESCRIPTION OF THE DRAWINGS

[0010] The invention will become more fully understood from the detaileddescription given hereinbelow illustration only, and thus are notlimitative of the present invention, and wherein:

[0011]FIG. 1 is a schematic view of the structure that measures theetching speed according to the invention;

[0012]FIG. 2 is a schematic view of the disclosed structure duringetching;

[0013]FIG. 3 is a flowchart of the disclosed method for measuring theetcing speed;

[0014]FIG. 4 is a schematic view of the disclosed structure withadditional dummy resistors;

[0015]FIG. 5 is a schematic view of the disclosed structure withadditional dummy resistors during etching; and

[0016]FIG. 6 is a flowchart of the disclosed method with additionaldummy resistors for measuring the etching speed.

DETAILED DESCRIPTION OF THE INVENTION

[0017] We use an embodiment to explain the feasibility of the inventionwith reference to FIGS. 1 and 2. A test layer 100 shown in FIG. 1 is ametal layer. It is connected to several sensing resistors Re1, Re2, . .. , and Ren using pins 5 and semiconductor connector technology. Each ofthe sensing resistors Re1, Re2, . . . , and Ren forms a circuit via thetest layer 100 when measuring the etching speed. The sensing resistorsRe1, Re2, . . . , and Ren also produce a sensing equivalent resistanceRee′ by connecting to points e and e′ in parallel. Therefore,

[0018] Ree′=(Re1//Re2//Re3// . . . //Ren).

[0019] With reference to FIG. 2, when etching starts the sensingresistors Re1, Re2, . . . , and Ren are disconnected from the circuitone by one. For example, the sensing equivalent resistance Ree′ afterthe first resistor breaks is

[0020] Ree′=(Re2//Re3// . . . //Ren).

[0021] Please refer to FIG. 3 for the explanation of the disclosedmethod for measuring the etching speed. First, a test layer is provided(step 15). The test layer is a metal layer. Several sensing resistorsRe1, Re2, . . . , and Ren are provided so as to provide a sensingequivalent resistance Ree′ while measuring the etching speed (step 16).Since one end of each of the sensing resistors Re1, Re2, . . . , and Renis connected to the test layer 100 at a fixed distance apart and theother end to its adjacent sensing resistors Re1, Re2, . . . , and Ren.Therefore, a parallel circuit is formed via the test layer 100 andprovides a sensing equivalent resistance Ree′. One then starts to etchthe test layer. As the etching depth L increases, the sensing resistorsare disconnected from the circuit one by one, changing the sensingequivalent resistance Ree′ (step 17). Finally, one measures the sensingequivalent resistance Ree′, the corresponding time t, and thecorresponding etching depth L. The relation between the time t andetching depth L is thus obtained to compute the etching speed (step 18).One makes an L-t plot from the measured data using Ree′ as theintermediate variable. The slope of the curve in the plot is the etchingspeed. By measuring the tiny residual sensing equivalent resistanceRee′, one can determine whether the metal layer is completely removed.If there is any metal left in the metal layer, a nonzero Ree′ will bedetected.

[0022] Considering errors in the resistors owing to the manufacturingprocess, the invention also provides a design to account for sucheffects. When making the above structure using IC layout technology,several dummy resistors Rd1, Rd2, Rd3, . . . , and Rdn areinterdigitized by the sensing resistors Re1, Re2, . . . , and Ren at thesame time. The dummy resistors Rd1, Rd2, Rd3, . . . , and Rdn have fixedresistance. Therefore, the dummy equivalent resistance Rdd′ is alsofixed; namely,

[0023] Rdd′=(Rd1//Rd2//Rd3// . . . //Rdn).

[0024] When the etching process is going on, as shown in FIG. 4, thesensing resistors Re1, Re2, . . . , and Ren are disconnected from themetal layer one by one while the dummy equivalent resistance Rdd′ isunchanged. Therefore, after the first sensing resistor breaks from thecircuit, one has

[0025] Ree′=(Re2//Re3// . . . //Ren),

[0026] Rdd′=(Rd1//Rd2//Rd3// . . . //Rdn).

[0027] The method of measuring the etching speed with additional dummyresistors is shown in FIG. 6. First, a test layer 100 is provided (step15). Several sensing resistors Re1, Re2, . . . , and Ren are provided toprovide a sending equivalent resistance Ree′ (step 16). One end of eachof the sensing resistors Re1, Re2, . . . , and Ren is connected to thetest layer 100 at a fixed distance apart while the other end to theadjacent sensing resistors Re1, Re2, . . . , and Ren, so that they forma parallel circuit via the test layer 100 to provide a sensingequivalent resistance Ree′. Afterwards, several dummy resistors Rd1,Rd2, . . . , and Rdn are provided to, along with the sensing equivalentresistance Ree′, produce a reference value N (step 19). Since the dummyresistors Rd1, Rd2, . . . , and Rdn are installed next to the sensingresistors Re1, Re2, . . . , and Ren, respectively, a dummy equivalentresistance Rdd′ is given to combine with the sensing equivalentresistance Ree′to generate a reference value N. Explicitly,

[0028] Rdd′/Ree′=N.

[0029] When one etches the test layer, the etching depth increasesgradually so that the sensing resistors are disconnected from thecircuit one by one, thereby changing the sensing equivalent resistance(step 17). One also measures several reference values N and thecorresponding time t and etching depth L, from which the etching speedis computed (step 20). The sensing equivalent resistance Ree′ varies asthe test layer 100 is etched; however, the dummy equivalent resistanceRdd′ is equal to the initial value of the sensing equivalent resistanceRee′ before etching. The purpose of the reference value N is to accountfor the errors on both the sensing resistors and the dummy resistorsthat are manufactured using the same process. By taking the ratio N, theerrors on both types of resistors can be removed. Finally, one makes anL-t plot using N as the intermediate variable. The curve slope in theplot is the etching speed. By measuring the tiny residual reference N,one can determine whether the metal layer is completely removed. Ifthere is any metal left in the metal layer, a nonzero N will bedetected.

EFFECTS OF THE INVENTION

[0030] The invention measures the etching speed of a metal layer in anobjective and accurate way for MEMS manufacturing processes. It can alsobe used to determine whether a sacrificial layer is completely removedin an etching process.

[0031] Certain variations would be apparent to those skilled in the art,which variations are considered within the spirit and scope of theclaimed invention.

What is claimed is:
 1. A structure for measuring the etching speedcomprising: a test layer; and a plurality of sensing resistors, each ofwhich has one end connected to the test layer at a fixed distance apartand the other end connected to the adjacent sensing resistors, so thatthe sensing resistors form a parallel circuit via the test layer andprovide a sensing equivalent resistance; wherein the sensing resistorsare disconnected from the circuit one by one as the test layer isetched, thereby changing the sensing equivalent resistance.
 2. Thestructure of claim 1, wherein the sensing resistors are connected to thetest layer using semiconductor connector technology.
 3. The structure ofclaim 1, wherein each of the sensing resistors is connected to the testlayer using a pin.
 4. A method for measuring the etching speedcomprising the steps of: providing a test layer; providing a pluralityof sensing resistors, each of which has one end connected to the testlayer at a fixed distance apart and the other end connected to theadjacent sensing resistors, so that the sensing resistors form aparallel circuit via the test layer and provide a sensing equivalentresistance; etching the test layer, the sensing equivalent resistancechanges with the sensing resistors being disconnected from the circuitone by one as the etching depth of the test layer increases; andmeasuring a plurality of the sensing equivalent resistance of thesensing resistors, the corresponding times and the corresponding etchingdepths to obtain a relation between the time and the etching depth,thereby computing the etching speed.
 5. The method of claim 4, whereinthe sensing resistors are connected to the test layer usingsemiconductor connector technology.
 6. The method of claim 4, whereineach of the sensing resistors is connected to the test layer using apin.
 7. A structure for measuring the etching speed comprising: a testlayer; and a plurality of sensing resistors, each of which has one endconnected to the test layer at a fixed distance apart and the other endconnected to the adjacent sensing resistors, so that the sensingresistors form a parallel circuit via the test layer and provide asensing equivalent resistance, the sensing resistors being disconnectedfrom the circuit one by one as the test layer is etched, therebychanging the sensing equivalent resistance; and a plurality of dummyresistors, each of which is next to the corresponding sensing resistor,and has both ends connected to both ends of the adjacent dummy resistorsto form a parallel circuit, the dummy resistors providing a dummyequivalent resistance that is combined with the sensing equivalentresistance to give a reference value; wherein the sensing equivalentresistance varies as the test layer is etched and the dummy equivalentresistance is equal to the initial value of the sensing equivalentresistance before etching, the reference value is obtained by taking theratio between the sensing equivalent resistance and the dummy equivalentresistance when measuring the etching speed.
 8. The structure of claim7, wherein the sensing resistors are connected to the test layer usingsemiconductor connector technology.
 9. The structure of claim 7, whereineach of the sensing resistors is connected to the test layer using apin.
 10. A method for measuring the etching speed comprising the stepsof: providing a test layer; providing a plurality of sensing resistors,each of which has one end connected to the test layer at a fixeddistance apart and the other end connected to the adjacent sensingresistors, so that the sensing resistors form a parallel circuit via thetest layer and provide a sensing equivalent resistance; providing aplurality of dummy resistors, each of which is next to the correspondingsensing resistor, and has both ends connected to both ends of theadjacent dummy resistors to form a parallel circuit, the dummy resistorsproviding a dummy equivalent resistance that is combined with thesensing equivalent resistance to give a reference value; etching thetest layer, the sensing equivalent resistance changes with the sensingresistors being disconnected from the circuit one by one as the etchingdepth of the test layer increases; and measuring a plurality of thereference values during etching, the corresponding times and thecorresponding etching depths to obtain a relation between the time andthe etching depth, thereby computing the etching speed; wherein thesensing equivalent resistance varies as the test layer is etched and thedummy equivalent resistance is equal to the initial value of the sensingequivalent resistance before etching, the reference value is obtained bytaking the ratio between the sensing equivalent resistance and the dummyequivalent resistance when measuring the etching speed.
 11. The methodof claim 10, wherein the sensing resistors are connected to the testlayer using semiconductor connector technology.
 12. The method of claim10, wherein each of the sensing resistors is connected to the test layerusing a pin.